Designing Self-Timed Devices Using the Finite Automaton Model

&YNCHRONOUS SYSTEMS offer many advantages in terms of performance and power. Designing them, however, is essentially an art (see the Designers as artists box), and the quality of the final circuit implementation depends greatly on the designer’s skill. Our research, therefore, defines a procedure that reliably accomplishes the routine work associated with designing one class of asynchronous systems, self-timed devices. We do not intend to take the designer out of the design process; rather, our procedure frees a designer to review more possibilities. Our procedure synthesizes a selftimed device with external inputs from a finite Mealy automaton specification. We chose to use that specification and a two-register structure with master-slave flipflops for two reasons: